Description

Job Details:

Job Description:

About the Role:

The Sr. Director of Platform Planning & Program Management is responsible for managing the development timeline for all of Design Technology Platform (DTP) deliverables spanning PDKs, Foundational IPs, Reference Flows, and Platform Validation to meet release commits and customer needs. This leader is responsible for communicating risks, creating solution plans, and working closely with all domain owners to guarantee flawless execution.

This leader serves as the delivery integrator and hence is responsible for working with all domain owners to plan the timeline of intermediate deliverables and to always foresee the status of development & interdependencies to always have a proactive plan to guarantee meeting delivery commit. Also, this leader will have a unique vintage point to identify improvement opportunities in both quality and efficiency.

Experience Required:

• Semiconductor background to understand the impact of process feature add on PDK collaterals & FIP design
• PDK background to understand the interdependencies between different PDK components
• FIP background to understand the requirements of FIP design & expected deliverables
• Design Flow background to understand how PDK & FIP are utilized in design
• Program management skills to drive execution & discipline to deliver to commits
• Platform planning mindset to proactively collaborate with different area owners to deliver a complete & validated design platform. And identify efficiency improvement opportunities.
• The capability to foresee delivery risks, identifying work arounds for short term, and proposing long term improvements to avoid such risks in the future.
• Excellent customer services mindset and skills to guarantee meeting customer needs & timeline.
• Proven experience in building a high-performance team, developing leaders, and driving necessary organizational change and culture
• Able to build effective working relationships across all levels of the organization and influence the direction of the company.
• Innovative mindset to identify and drive improvement initiatives that target workflow efficiency, quality of deliverables, customer satisfaction, and AI solutions.
• Complex problem solving and decision-making skills with background in results orientation.

Qualifications:

• Master's or Ph.D. in Electrical Engineering or Computer Engineering
• 20+ years of industry and leadership experience including direct experience in design and design enablement

Job Type:
Experienced Hire

Shift:
Shift 1 (United States of America)

Primary Location:
US, Oregon, Hillsboro

Additional Locations:
US, Arizona, Phoenix, US, California, Santa Clara, US, Texas, Austin

Business group:
Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth.

Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust
This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel .

Annual Salary Range for jobs which could be performed in the US: $271,620.00-383,460.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
Requisition #: JR0280869

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