Description

Minimum qualifications:

• Bachelor's degree or equivalent practical experience within ASIC Design and Hardware Architecture.
• 10 years of work experience in ASIC Hardware architecture and silicon design.

Preferred qualifications:

• Master's degree or PhD in Computer Science or Electrical Engineering.
• Experience architecting and designing low power ASIC hardware IP for complex SoCs in the following areas: Graphics Processing and Machine Learning Acceleration.
• Experience collaborating cross-functionally with Product Management, SoC architecture, IP design and verification, camera, video, Graphics/ML algorithm and software development teams.
• Experience in architecting ambient or always-on vision hardware and workflows for ultra low power SoC applications.
• Extensive experience in micro architecture, power and performance optimization.
• Familiarity with interconnect/fabric, security, multi-level caching architectures.

About the jobBe part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.Individual pay is determined by factors including job-related skills, experience, and relevant education or training.

US: $192000 - $279000 (USD) 20% bonus target equity benefits

Learn more about benefits at Google.

Responsibilities

• Define and deliver the hardware Multimedia/Graphics ASIC IP integration architecture that meet competitive power, performance, area and image quality targets, which will require owning the targets through to tape-out and product launch.
  
• Collaborate with Graphics, Camera, Video, Display and ML software, system and algorithm engineers to co-develop and specify competitive hardware IP architectures for integration into complex SoCs.
  
• Partner with GPU, TPU, camera ISP, video and display hardware IP design teams across global sites to drive the hardware IP architecture specifications into design implementation for complex SoCs.
  
• Align with SoC and System/Experience architects on meeting power, performance and area requirements at the SoC level for Graphics, ML, and Multimedia use cases and experiences.

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Requisition #: 81661877553111750

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