Description

Job Details:

Job Description:

About the Role

We are seeking a highly motivated Analog Circuit Design Engineer with a strong interest in power delivery circuits and architectures. In this role, you will design and develop advanced analog and mixed-signal circuits for integrated voltage regulation and power management IPs that are critical to Intel's products.

You are passionate about solving complex challenges in power integrity, efficiency, transient response, and low-noise design, and thrive in collaborative, fast-paced environments.

Key Responsibilities

• Design and develop analog and mixed-signal ICs for power delivery IPs, including IVRs, LDOs, DC-DC converters, and power gating circuits
• Perform transient, AC, and noise simulations to evaluate stability, load regulation, droop response, and PSRR
• Analyze and optimize power delivery performance, including efficiency, transient response, and power integrity
• Conduct tradeoff analysis across power, performance, area, bandwidth, and quiescent current
• Create floorplans and guide layout with attention to matching, parasitics, current density, and clean power routing
• Perform power integrity analysis including IR drop, decoupling strategies, and package interaction effects
• Collaborate with architecture, digital, layout, and platform teams to ensure robust power delivery integration
• Develop and execute validation test plans to verify design performance against specifications
• Support post-silicon bring-up, characterization, and debug of power delivery circuits
• Document design methodologies, specifications, and validation results
• Participate in design reviews and contribute to next-generation power delivery innovations

What We're Looking For

To be successful in this role, you should demonstrate the following professional traits:

• Collaborative mindset - ability to work effectively across architecture, digital, layout, and platform teams in a fast-paced environment
• Problem-solving drive - passionate about tackling complex engineering challenges in power integrity, efficiency, and low-noise design
• Detail-oriented approach - disciplined in documentation, design reviews, and validation to ensure accuracy and design integrity

Qualifications:

Minimum Qualifications

You must possess one of the following education and experience combinations to be initially considered for this position:

• Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 6+ years of experience, OR
• Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 4+ years of experience, OR
• PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field with 2+ years of experience

In addition, all candidates must have:

• Experience in analog or mixed-signal circuit design (Amplifiers, LDOs, PLLs, ADCs, etc.)
• Experience taking designs from circuit to layout to silicon prototype
• Strong background in VLSI and industry-standard CAD tools for schematic and simulation, such as Cadence Spectre, AMS Designer, Virtuoso, and StarRC

Preferred Qualifications

• Knowledge of Power Delivery, Power Management systems, or PMIC
• Experience in mixed-signal modeling and system analysis of complex feedback systems

Job Type:
Experienced Hire

Shift:
Shift 1 (United States of America)

Primary Location:
US, California, Santa Clara

Additional Locations:
US, Massachusetts, Beaver Brook, US, Oregon, Hillsboro

Business group:
The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.

Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust
N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel .

Annual Salary Range for jobs which could be performed in the US: $164,470.00-232,190.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
Requisition #: JR0285532

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