Description

Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
• 10 years of experience in silicon performance or power analysis, SoC architecture, or low-level software optimization with a focus on memory systems.
• Experience with pre or post-silicon validation, debugging, and performance or power optimization.
• Experience in performance power trade-off in Mobile SoC - interconnects, memory controllers, third party Physical Layer (PHY) or Dynamic Random Access Memory (DRAM).

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
• Experience with memory systems, including caching, virtual memory, scheduling, and interconnects.
• Experience with programming skills in C , Python, or similar languages for scripting and analysis.
• Experience with architecture modeling and simulation frameworks to evaluate architecture and design trade-offs.
• Experience with hardware and software co-design principles and with leading and contributing to SoC design projects.
• Excellent collaboration, communication, leadership skills along with the ability to influence and communicate technical concepts across teams.

About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

As the System Performance lead, you will contribute your SoC architecture expertise in enabling and optimizing solutions impacting system level hardware and software co-design solutions for CPU, GPU, Multimedia,Interconnects, Memory controllers, and Machine learning on SoC. You will work cross functionally with many teams across Google to define a framework for system analysis solution which can be deployed to debug/analyze the use case scenarios.You expertise in leading teams for architecture analysis will help define key differentiating user experiences on Google Hardware devices and drive these user experience in Google Si.
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

The US base salary range for this full-time position is $183,000-$271,000 bonus equity benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.

Responsibilities

• Analyze SoC and memory subsystem architectures using performance/power models to explore design trade-offs and drive future system design.
• Partner with architecture, hardware, and software teams to align memory subsystem design with application and OS needs.
• Identify and optimize micro-architectural bottlenecks using data, workloads, and simulations.
• Drive improvements in memory subsystem Performance, Power, Area (PPA) through data flow and system configuration optimization for key workloads.
• Collaborate cross-functionally for architectural implementation and validation (Hardware (HW), Software (SW), Architecture, Firmware (FW)).

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Requisition #: 104191235240927942

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