- Career Center Home
- Search Jobs
- SOC Design Engineer - RTL design and Integration
Results
Job Details
Explore Location
Intel
Hillsboro, Oregon, United States
(on-site)
Posted
1 day ago
Intel
Hillsboro, Oregon, United States
(on-site)
Job Type
Full-Time
SOC Design Engineer - RTL design and Integration
The insights provided are generated by AI and may contain inaccuracies. Please independently verify any critical information before relying on it.
SOC Design Engineer - RTL design and Integration
The insights provided are generated by AI and may contain inaccuracies. Please independently verify any critical information before relying on it.
Description
Job Details:Job Description:
Develops the logic design, register transfer level (RTL) coding, and simulation for a CPU required to generate cell libraries, functional units, and the CPU IP block for integration in full chip designs. Participates actively in the definition of architecture and microarchitecture features of the CPU being designed. Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation. Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features. Documents micro architectural specs (MAS) of the CPU features being designed. Supports SoC customers to ensure highquality integration of the CPU block.
Qualifications:
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
Bachelor's degree in electrical engineering, Computer Engineering or related field with 3+ years of relevant experience, OR Master's degree Electrical Engineering, Computer Engineering or related field with 2+ years of relevant experience
The relevant experience would include one of the following areas:
- RTL and UPF design of complex microarchitectures
- Microarchitect for SoC or CPU features
- Knowledge of Clock domain and reset domain crossings, design power considerations, design clocking considerations
Preferred Qualifications:
- 6+ years of experience in RTL design or integration using industry EDA tools.
- Product development and delivery on leading edge process nodes
- Experience in Python programming language
Job Type:
Experienced Hire
Shift:
Shift 1 (United States of America)
Primary Location:
US, Oregon, Hillsboro
Additional Locations:
Business group:
Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel .
Annual Salary Range for jobs which could be performed in the US: $122,440.00-172,860.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.
*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
Requisition #: JR0281961
pca3lyuhf
Job ID: 82985114

Intel
United States
Managing your career and your personal life can be challenging. Intel is committed to making it easier. We want to help our employees make the most of both worlds. Whether you are a parent or have education goals, eldercare responsibilities, or just some of life's details to attend to, we have a variety of programs in place around the world to help. To address the diverse needs of our employees, we offer a range of options that varies across businesses, geographies, sites, and job types.
View Full Profile
More Jobs from Intel
Module Development Engineer
Hillsboro, Oregon, United States
5 hours ago
CPU Design Verification Engineer
Austin, Texas, United States
5 hours ago
Senior Process Integration Development Engineer
Phoenix, Arizona, United States
5 hours ago
Jobs You May Like
Median Salary
Net Salary per month
$4,675
Median Apartment Rent in City Center
(1-3 Bedroom)
$1,900
-
$2,750
$2,325
Safety Index
81/100
81
Utilities
Basic
(Electricity, heating, cooling, water, garbage for 915 sq ft apartment)
$100
-
$300
$134
High-Speed Internet
$25
-
$100
$49
Transportation
Gasoline
(1 gallon)
$3.86
Taxi Ride
(1 mile)
$2.00
Data is collected and updated regularly using reputable sources, including corporate websites and governmental reporting institutions.
Loading...
