Description

Job Details:

Job Description:

The Role and Impact

As a CPU Power Management Architect, you will be at the forefront of Intel's innovation, shaping the future of CPU designs for high-performance computing and low-power products. This role is integral to Intel's mission to deliver cutting-edge solutions that power the world's technology, from advanced data centers to everyday consumer devices. You will play a pivotal role in driving end-to-end CPU Power management architecture specifications, ensuring optimal performance, power efficiency, scalability, and interoperability across hardware and software. Through creative problem-solving and collaboration, you will influence cross-functional roadmaps, define technology targets, and deliver revolutionary CPU architectures that meet diverse market requirements.

Key Responsibilities

• Define end-to-end CPU power management microarchitecture, including the design and specification of hardware mechanisms for dynamic voltage and frequency scaling (DVFS), power state transitions (C-states and P-states), thermal control, hotspot detection and mitigation, droop mitigation, ICCMAX enforcement, reset flow architecture, Machine learning algorithms for power and performance, power delivery and power gating techniques, as well as telemetry and debug capabilities.
• Explore new approaches and devise novel power management and thermal management solutions that deliver optimized CPUs for multiple segments, from high-performance computing to extreme low-power applications. Identify emerging market trends and translate them into novel features.
• Collaborate with RTL designers, SoC architects, and firmware/OS teams to ensure power management algorithms are implemented correctly and interface seamlessly with software.
• Review and influence cross-functional roadmaps and collaborate with architects, design, verification, and validation engineers during project execution.
• Participate in the post silicon debug and tuning of silicon. You will compare real-world power/performance data against your pre-silicon models to close the gap between theoretical projections and actual hardware results.
• Expertise in CPU architecture fundamentals, microarchitecture design, low-power design, RTL development, and System Verilog.
• Proven ability to debug microarchitecture and simulation issues and solve complex design problems.
• Strong understanding of system-level power and thermal constraints, and how they interact with user experience
• Ability to define and analyze power/performance KPIs and drive architectural decisions based on data.
• Extensive experience in low-power design, including RTL development and System Verilog.
• Experience with hardware/firmware/software co-design for complex power management systems.

Qualifications:

Minimum Qualifications

• BS in electrical and computer engineering
• 10+ years of experience working in CPU and SOC power management and thermal management architecture

Preferred Qualifications

• Strong analytical and problem-solving skills demonstrated through leadership roles or team management.
• Effective collaboration skills to work across teams and influence cross-functional roadmaps.
• Passion for driving innovation and contributing to Intel's mission of delivering world-class technology solutions.

Job Type:
Experienced Hire

Shift:
Shift 1 (United States of America)

Primary Location:
US, Texas, Austin

Additional Locations:
US, Oregon, Hillsboro

Business group:
Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences.

Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust
This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel .

Annual Salary Range for jobs which could be performed in the US: $190,610.00-361,480.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
Requisition #: JR0282671

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