Description

Job Details:

Job Description:

You will be a member of the ACE UC CPU Design Automation CAD team. You will be responsible for:

• Develop and to architect new tools and flows for RTL to physical design as well as enhance existing flows for better efficiency and robustness.
• Develop and maintain RTL to layout design infra-structure, including full internal cloud management and optimization, permissions and license management. Compute and storage forecast and management.
• Develop and support flows including a flow control manager which is responsible for running physical collateral through the necessary stages for backend integration.
• Use ML and other techniques to analyze the content of the BE databases for better storage and faster access.
• Analysis of compute and memory usage for the aggregate jobs of the FE and BE flows with the goal of more efficient and effective compute use.
• Provide and support indicators that quickly measure compute, memory and disk resources for efficiencies and sends alerts when key resources are highly utilized.
• Enablement and development of the Front-End (RTL, Verification) and back end (BE) databases and flows for ACE CPU physical design collateral. Includes the setup and support of the user environment for all design tools and flows.
• Strong knowledge of cloud management tools
• Familiarity with Data structures and Algorithms

You will work closely with the FE and BE design engineers as well as engineering compute (EC) for enablement and support of the BE environment.

Qualifications:

Candidate must have:

• Bachelors Degree
• 5+ years experience in programming and scripting skills (e.g. C/C++, Perl/Tcl, Python, shell scripting, Linux/Unix, etc.)

Preferred Qualifications

• Prior experience related to chip design automation tools, flows and infra-structure.
• Knowledge of VLSI physical and logical design as well as VLSI Design Automation tools.

Job Type:
Experienced Hire

Shift:
Shift 1 (United States of America)

Primary Location:
US, Texas, Austin

Additional Locations:
US, Oregon, Hillsboro

Business group:
The Silicon Engineering Group (SIG) is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs from architecture to manufacturing readiness that power Intel's leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.

Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust
This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.

Benefits:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:

https://intel.wd1.myworkdayjobs.com/External/page/1025c144664a100150b4b1665c750003

Annual Salary Range for jobs which could be performed in the US: 186,070.00 USD - 349,850.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
Requisition #: JR0277660

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